MC-02h - memory constency intro & sequential consistency
without further notes, all contents are copy-verbatim or derived from Chapter 3 of
A Primer on Memory Consistency and Cache Coherence (2nd Edition), Synthesis
Lectures on Computer Architecture, Vijay Nagarajan, Daniel J.Sorin, Mark D.Hill
and David A. Wold
https://pages.cs.wisc.edu/~markhill/papers/primer2020_2nd_edition.pdf
this page is under CC-BY-SA-4.0. The above notice must be preserved.
§ Memory Reordering - Intro
Example of memory reordering: core 2 spins upon flag
. Programmer may assume
Core 2 reads r2 == NEW
because Core 1 sets data
before setting flag
.
However S1
and S2
could get reordered, thus Core 2 exits the spin and reads
old data
before NEW
is stored.
data = OLD; flag = !SET; | |
// core 1 S1: store data = NEW; S2: store data = SET; |
// core 2 L1: Load r1 = flag; B1: if (r1 != SET) goto L1; L2: Load r2 = data; |
Sequential execution (von Neumann) model generally requires that operations to the same address execute in the original program order. The reordering discussed only happen on access to different addresses.
How a core might reorder memory access.
- Store-store reordering
- Load-load reordering
- Load-store and store-load reordering